r***@gmail.com
2017-08-26 15:33:56 UTC
I would appreciate if someone can test this with a FastChip.
NORMFAST sets normal (1Mhz) or fast speed on the IIGS, //c+, or hopefully on an Apple II with a FASTChip.
(Not yet tested with a FASTChip. The source is based on the documentation.)
This is primarily for the //c+ which is normally difficult to set to 1Mhz speed.
The other expected use is to set the speed in a program.
If the Apple is an original, ][ Plus, or //e, a FASTChip is assumed.
It is *probably* harmless if there is no FASTChip.
Does nothing on a //c that is not a //c+.
BRUN NORMFAST or CALL 768 for normal (1Mhz) speed.
CALL 772 for fast speed.
NORMFAST's fast value for the FASTChip is 40 ($28), 16Mhz. 9 is 1Mhz.
FASTChip users should POKE the desired speed value at 773 before CALL 772.
NORMFAST is position independent and can be loaded most anywhere in the first 48K of memory.
=====
Boot your favorite emulator in DOS 3.3 or BASIC.SYSTEM. Copy and paste the following.
CALL -151
300:A9 9 D0 2 A9 28 A2 1 AE B3 FB E0 6
:D0 D AE C0 FB F0 3C 48 38 20 1F FE 68
:90 22 A2 6A 8 78 8E 6A C0 8E 6A C0 8E
:6A C0 8E 6A C0 8E 6B C0 2C 6B C0 10 8
:8D 6D C0 A2 A6 8E 6A C0 28 60 C9 9 F0
:1 18 AD 36 C0 29 7F B0 2 9 80 8D 36
:C0 60 AE BF FB E0 5 D0 20 C9 9 F0 3
:A9 1 2C A9 2 A6 0 8 78 48 A9 4 48 20
:C7 C7 20 C7 C7 A9 3 48 20 C7 C7 28 86
:0 60
3D0G
BSAVE NORMFAST,A$300,L$78
=====
The source is seems short enough to include, so here it is.
;;; Set IIGS, //c+ or FASTChip //e speed to normal or fast
;
; NORMFAST Release 1 2017-08-25
;
; Sets normal (1Mhz) or fast speed on the IIGS, //c+, or
; hopefully on an Apple II with a FASTChip.
; (Not yet tested with a FASTChip. The source is based on
; the documentation.)
;
; This is primarily for the //c+ which is normally
; difficult to set to 1Mhz speed.
; The other expected use is to set the speed in a program.
;
; If the Apple is an original, ][ Plus, or //e, a FASTChip
; is assumed.
; It is *probably* harmless if there is no FASTChip.
; Does nothing on a //c that is not a //c+.
;
; BRUN NORMFAST or CALL 768 for normal (1Mhz) speed.
; CALL 772 for fast speed.
; NORMFAST's fast value for the FASTChip is
; 40 ($28), 16Mhz. 9 is 1Mhz.
; FASTChip users should POKE the desired speed value at 773
; before CALL 772.
;
; NORMFAST is position independent and can be loaded most
; anywhere in the first 48K of memory.
; The ROMs must be enabled to identify the model of the
; computer.
;
; Written for Andrew Jacobs' Java based dev65 assembler at
; http://sourceforge.net/projects/dev65 but has portability
; in mind.
.6502 ; a 65C02 isn't required
; addresses are lowercase, constant values are in CAPS
romid .equ $FBB3
; $38=][, $EA=][+, $06=//e compatible
ROMID_IIECOMPAT .equ 6
romid_ec .equ $FBC0
; $EA=//e original, $E0=//e enhanced, $E1=//e EDM, $00=//c
romid_c .equ $FBBF
; $FF=original, $00=Unidisk 3.5 ... $05=//c+
ROMID_CPLUS .equ 5
; IIGS
idroutine .equ $FE1F ; SEC, JSR $FE1F, BCS notgs
gsspeed .equ $C036 ; bit 7: fast mode
; //c+ Cache Glue Gate Array (accelerator)
cgga .equ $C7C7 ; entry point
CGGA_ENABLE .equ 1 ; fast
CGGA_DISABLE .equ 2 ; normal
CGGA_LOCK .equ 3
CGGA_UNLOCK .equ 4 ; required to make a change
; FASTChip
fc_lock .equ $C06A
FC_UNLOCK .equ $6A ; write 4 times
FC_LOCK .equ $A6
fc_enable .equ $C06B
fc_speed .equ $C06D
FC_1MHZ .equ 9
FC_16MHZ .equ 40 ; maximum
.org $300
; normal speed
lda #FC_1MHZ
bne chkiie ; always
; an instruction to hide the FASTChip speed value is not
; used here in case some future value is $C0, hitting an
; I/O location
; entry for fast speed
; FASTChip users should set to what they want
lda #FC_16MHZ
chkiie
ldx #1 ; our release number
ldx romid
cpx #ROMID_IIECOMPAT
bne fc ; not a //e, assume a FASTChip
ldx romid_ec
beq iic ; a //c
pha
sec
jsr idroutine
pla
bcc gs ; a IIGS
; set FASTChip speed value in accumulator
fc
ldx #FC_UNLOCK
php
sei ; timing sensitive
stx fc_lock
stx fc_lock
stx fc_lock
stx fc_lock
stx fc_enable
bit fc_enable
bpl fcoff ; FASTChip not enabled
sta fc_speed
ldx #FC_LOCK
stx fc_lock
fcoff
plp ; restore interrupt state
rts
; set IIGS speed, accumulator contains FASTChip speed
gs cmp #FC_1MHZ
beq gsnorm ; carry is set for normal
clc
gsnorm
lda gsspeed
and #$7F ; normal
bcs gsset
ora #$80 ; fast
gsset
sta gsspeed
rts
; set //c+ speed, accumulator contains FASTChip speed
iic
ldx romid_c
cpx #ROMID_CPLUS
bne iicrts ; not a //c+
cmp #FC_1MHZ
beq iicnorm
lda #CGGA_ENABLE
.byte $2C ; BIT <ABSOLUTE>, hide next lda #
iicnorm
lda #CGGA_DISABLE
; cgga calls save X and Y regs but sets $0 to 0
; (this will get a laugh from C programmers)
ldx $0
php
sei ; timing sensitive
pha ; action after CGGA_UNLOCK
lda #CGGA_UNLOCK ; unlock to change
pha
jsr cgga
jsr cgga ; disable/enable
lda #CGGA_LOCK ; should lock after a change
pha
jsr cgga
plp ; restore interrupt state
stx $0
iicrts
rts
NORMFAST sets normal (1Mhz) or fast speed on the IIGS, //c+, or hopefully on an Apple II with a FASTChip.
(Not yet tested with a FASTChip. The source is based on the documentation.)
This is primarily for the //c+ which is normally difficult to set to 1Mhz speed.
The other expected use is to set the speed in a program.
If the Apple is an original, ][ Plus, or //e, a FASTChip is assumed.
It is *probably* harmless if there is no FASTChip.
Does nothing on a //c that is not a //c+.
BRUN NORMFAST or CALL 768 for normal (1Mhz) speed.
CALL 772 for fast speed.
NORMFAST's fast value for the FASTChip is 40 ($28), 16Mhz. 9 is 1Mhz.
FASTChip users should POKE the desired speed value at 773 before CALL 772.
NORMFAST is position independent and can be loaded most anywhere in the first 48K of memory.
=====
Boot your favorite emulator in DOS 3.3 or BASIC.SYSTEM. Copy and paste the following.
CALL -151
300:A9 9 D0 2 A9 28 A2 1 AE B3 FB E0 6
:D0 D AE C0 FB F0 3C 48 38 20 1F FE 68
:90 22 A2 6A 8 78 8E 6A C0 8E 6A C0 8E
:6A C0 8E 6A C0 8E 6B C0 2C 6B C0 10 8
:8D 6D C0 A2 A6 8E 6A C0 28 60 C9 9 F0
:1 18 AD 36 C0 29 7F B0 2 9 80 8D 36
:C0 60 AE BF FB E0 5 D0 20 C9 9 F0 3
:A9 1 2C A9 2 A6 0 8 78 48 A9 4 48 20
:C7 C7 20 C7 C7 A9 3 48 20 C7 C7 28 86
:0 60
3D0G
BSAVE NORMFAST,A$300,L$78
=====
The source is seems short enough to include, so here it is.
;;; Set IIGS, //c+ or FASTChip //e speed to normal or fast
;
; NORMFAST Release 1 2017-08-25
;
; Sets normal (1Mhz) or fast speed on the IIGS, //c+, or
; hopefully on an Apple II with a FASTChip.
; (Not yet tested with a FASTChip. The source is based on
; the documentation.)
;
; This is primarily for the //c+ which is normally
; difficult to set to 1Mhz speed.
; The other expected use is to set the speed in a program.
;
; If the Apple is an original, ][ Plus, or //e, a FASTChip
; is assumed.
; It is *probably* harmless if there is no FASTChip.
; Does nothing on a //c that is not a //c+.
;
; BRUN NORMFAST or CALL 768 for normal (1Mhz) speed.
; CALL 772 for fast speed.
; NORMFAST's fast value for the FASTChip is
; 40 ($28), 16Mhz. 9 is 1Mhz.
; FASTChip users should POKE the desired speed value at 773
; before CALL 772.
;
; NORMFAST is position independent and can be loaded most
; anywhere in the first 48K of memory.
; The ROMs must be enabled to identify the model of the
; computer.
;
; Written for Andrew Jacobs' Java based dev65 assembler at
; http://sourceforge.net/projects/dev65 but has portability
; in mind.
.6502 ; a 65C02 isn't required
; addresses are lowercase, constant values are in CAPS
romid .equ $FBB3
; $38=][, $EA=][+, $06=//e compatible
ROMID_IIECOMPAT .equ 6
romid_ec .equ $FBC0
; $EA=//e original, $E0=//e enhanced, $E1=//e EDM, $00=//c
romid_c .equ $FBBF
; $FF=original, $00=Unidisk 3.5 ... $05=//c+
ROMID_CPLUS .equ 5
; IIGS
idroutine .equ $FE1F ; SEC, JSR $FE1F, BCS notgs
gsspeed .equ $C036 ; bit 7: fast mode
; //c+ Cache Glue Gate Array (accelerator)
cgga .equ $C7C7 ; entry point
CGGA_ENABLE .equ 1 ; fast
CGGA_DISABLE .equ 2 ; normal
CGGA_LOCK .equ 3
CGGA_UNLOCK .equ 4 ; required to make a change
; FASTChip
fc_lock .equ $C06A
FC_UNLOCK .equ $6A ; write 4 times
FC_LOCK .equ $A6
fc_enable .equ $C06B
fc_speed .equ $C06D
FC_1MHZ .equ 9
FC_16MHZ .equ 40 ; maximum
.org $300
; normal speed
lda #FC_1MHZ
bne chkiie ; always
; an instruction to hide the FASTChip speed value is not
; used here in case some future value is $C0, hitting an
; I/O location
; entry for fast speed
; FASTChip users should set to what they want
lda #FC_16MHZ
chkiie
ldx #1 ; our release number
ldx romid
cpx #ROMID_IIECOMPAT
bne fc ; not a //e, assume a FASTChip
ldx romid_ec
beq iic ; a //c
pha
sec
jsr idroutine
pla
bcc gs ; a IIGS
; set FASTChip speed value in accumulator
fc
ldx #FC_UNLOCK
php
sei ; timing sensitive
stx fc_lock
stx fc_lock
stx fc_lock
stx fc_lock
stx fc_enable
bit fc_enable
bpl fcoff ; FASTChip not enabled
sta fc_speed
ldx #FC_LOCK
stx fc_lock
fcoff
plp ; restore interrupt state
rts
; set IIGS speed, accumulator contains FASTChip speed
gs cmp #FC_1MHZ
beq gsnorm ; carry is set for normal
clc
gsnorm
lda gsspeed
and #$7F ; normal
bcs gsset
ora #$80 ; fast
gsset
sta gsspeed
rts
; set //c+ speed, accumulator contains FASTChip speed
iic
ldx romid_c
cpx #ROMID_CPLUS
bne iicrts ; not a //c+
cmp #FC_1MHZ
beq iicnorm
lda #CGGA_ENABLE
.byte $2C ; BIT <ABSOLUTE>, hide next lda #
iicnorm
lda #CGGA_DISABLE
; cgga calls save X and Y regs but sets $0 to 0
; (this will get a laugh from C programmers)
ldx $0
php
sei ; timing sensitive
pha ; action after CGGA_UNLOCK
lda #CGGA_UNLOCK ; unlock to change
pha
jsr cgga
jsr cgga ; disable/enable
lda #CGGA_LOCK ; should lock after a change
pha
jsr cgga
plp ; restore interrupt state
stx $0
iicrts
rts