[coreboot] Reducing FSP performance time

[Antony AbeePrakash X V]

Hi,

We are building a FSP integrated coreboot image. We are using Intel FSP 2.0.
While booting the coreboot image we get the following FSP performance data logs.


Coreboot FSP Performance Data

ID: 950 - 951: 2347842343 - 2126500026 --> 170ms

ID: 952 - 953: #^!1175958314 - 3141289776 --> 1792ms

ID: 954 - 955: #^!1702555243 - #^!1465185826 --> 182ms

ID: 956 - 957: #^!1094328449 - #^!1091128442 --> 2ms

ID:952 - 953 is FSP_TEMP_RAM_EXIT which takes around 1.7 sec. Below are the queries:


1. What is happening in FSP_TEMP_RAM_EXIT phase ?
2. Can we reduce this time further ?

Please provide your feedback.

Thanks & Regards,
Antony


L&T Technology Services Ltd

www.LntTechservices.com<http://www.lnttechservices.com/>

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[Nico Huber]

Hi Antony,
FSP's temp-ram function is redundant with proper coreboot code. I can
only advice against using an FSP function if an open-source version
exists. With the open-source path you'd have much more insight in what
happens.

Maybe switching to the native coreboot code already helps reducing the
delay.

Nico

[Nico Huber]

We are new to this. Can you please share some sample code which skips this FSP temp RAM function ?

It should be an option in the Chipset menu. What it's called and what choices you have depends on your platform.

Nico